Remove all user-specific files from the repo

- to avoid duplicate definitions when simulating the user project example
- added a dummy __uprj_netlists with the wrapper includes instead to be able to run the caravel dv tests

-  to distinighuish it from what is in the user project example

…velop

… config

is split into two parts, one which loads data for I/O pads on the
right, and the other which loads data for the I/O pads on the
left.  This is designed to be "minimally invasive", so all signal
vectors remain exactly the same except for the serial load data
signals.

…into serial_refactor

Pull before push?  What changed?

Merging in the fix from the "develop" branch.

- if not given, it defaults to <path-to-project>/mag and <path-to-project>/gds

…velop

…velop

…velop

as the upper SPI flash I/O bits.  Added a testbench for running the
SPI flash in quad and quad DDR modes.  Updated the spiflash.v
module to implement reset of continuous mode on MBR command per
documentation, although it isn't clear how that is supposed to work.
The testbench fails in quad + DDR + continuous mode and possibly
the spimemio module needs adjusting.

bidirectional by default on startup (they are configured for input
anyway because quad SPI mode is not on at startup);  this avoids
having to configure the GPIO pins for flash access.  Corrected the
connections to the registered output for those two pins, which
fixes the timer2 testbench.

…velop

… root

for tests on Raven with actual hardware, but since the spiflash
module does not implement configuration registers, the latency
cannot be changed from 8 and so only 8 can be used in the testbench.
The qspi testbench now works properly and passes.

…velop

qspi testbench, not that it has been corrected, and passes.

…velop

- use default pdn script in OL; this removes the 0.24 difference with user project

…velop

…velop

…velop